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august 2000 rev. 4 - eco #13133 1 pcmcia flash memory card flv series pc card products features ? low cost high density linear flash card ? supports 3v or 5v only systems ? x8/ x16 data interface ?based on intel/sharp flashfile components ?fast read performance - 150ns @ 5v - 200ns @ 3.3v ? high performance random writes - 8s typical word write time @ 5v - 17s typical word write time @ 3.3v ? automated write and erase algorithms - command user interface ? 100,000 erase cycles per block ? 64k word symmetrical block architecture ? pc card standard type i form factor wedc?s flv series flash memory cards offer high density linear flash solid state storage solutions for code and data storage, high performance disk emulation and execute in place (xip) applications in mobile pc and dedicated (embedded) equipment. flv series cards conform to the pcmcia international standard the card?s control logic provides the system interface and controls the internal flash memories. the card can be read/written in byte-wide or word-wide mode which allows for flexible integration into various systems. combined with file management software, such as flash translation layer (ftl), flv flash cards provide removable high- performance disk emulation. the flv series offers low power modes controlled by registers. cards contain separate 2kb eeprom memory for card information structure (cis) which can be used for easy identification of card characteristics. the wedc flv series is based on intel/sharp flash memories. note: standard options include attribute memory.cards without attribute memory are available. cards are also available with or without a hardware write protect switch. pcmcia flash memory card 1 megabyte through 40 megabyte (intel/sharp based) wedc?s flv series is designed to support from 2 to 20 of 4mb, 8mb or 16mb components, providing a wide range of density options. cards are based on the 28f004sc (4mb), 28f008sc (8mb) and 28f016sc (16mb) devices for 3.3v or 5v only applications. devices codes for the 28f004sc, 28f008sc and the 28f016sc are: a7h, a6h and aah respectively. systems should be able to recognize all three codes. cards utilizing the 8mb components provide densities ranging from 2mb to 20mb in 2mb increments, cards utilizing 16mb components provide densities ranging from 4mb to 40mb in 4mb increments. 4 mbit memory devices are used only for smallest capacity cards (1mb). in support of the pc card 95 standard for word wide access, devices are paired. therefore, the flash array is structured in 64k word (128kbytes) blocks. write, read and block erase operations can be performed as either a word or byte wide operation . by multiplexing a0, ce1# and ce2#, 8-bit hosts can access all data on data lines dq0 - dq7. the fla21-fla28 series also supports the following pcmcia compatible register functions: soft reset via the configuration option register, power down (sleep mode) via the configuration and status register and monitoring of ready/busy, soft reset and power down via the card status register (cards without attribute memory do not have registers). the flv series cards conform to the pc card (pcmcia) and jeida standards, providing electrical and physical compatibility. the pc card form factor offers an industry standard pinout and mechanical outline, allowing density upgrades without system design changes. wedc?s standard cards are shipped with wedc?s logo. cards are also available with blank housings (no logo). the blank housings are available in both a recessed (for label) and flat housing. please contact your wedc sales representative for further information on custom artwork. general description architecture overview
august 2000 rev. 4 - eco #13133 2 pcmcia flash memory card flv series pc card products vcc device (n-2) device 1 csn device 2 cs1 cs0 device pair 0 device pair 1 device 3 device pair (n/2 - 1) rh# data bus q0-q7 i/o buffer m res wh# vcc data bus d8-d15 control 4000h vcc data bus d0-d7 device (n-1) 0000h wl# card management registers rl# data bus q8-q15 device 0 q0-q7 wh# wl# csn rl# rh# cn at/reg enable cs0 c0 control logic pcmcia interface ctrl attrib. mem cis eeprom 2kb we# oe# ce2# ce1# reg# a0 wp sr clr reg clr /sr /pd address bus control address bus address buffer array address bus a1-a25 block diagram registers in attribute memory space configuration option register 4000h register name status reg. 4100h 4002h config. and status reg. address d7 d7 soft reset, active high 1 = reset state 0 = end reset state d6 levelreq (not supported) d5-d0 configuration index (not supported) sres d6 lreq d4 cor d5 configuration option register: adrs=4000h d2 d1 d0 write only -configuration index- d3 write only csr d2 power down; active high 1=place all memory devices in power down mode 0=normal operation power on default=0 not supported d1 d7 d6 d2 d5 d0 d4 pdwn d3 not supported configuration status register: adrs=4002h d5 represents the state of sreset bit in cor (4000h) 1=reset 0=normal operation power on default d5=0 d3 represents the state of power down bit (d2) in csr (4002h) 1=power down d0 reflects the card's ready/busy signal (pin 16) driven by memory components ready/busy outputs.this bit allows software polling of the card's ready/busy status. 1=ready sr read only status register: adrs=4100h d2 not supported d0 not supported d1 r/bsy d5 sreset d4 d7 d3 d6 pdwn device type manuf id device id 28f008sc 89 h a6 h 28f016sc 89 h aa h 28f004sc 89 h a7 h
august 2000 rev. 4 - eco #13133 3 pcmcia flash memory card flv series pc card products pin signal name i/o function active pin signal name i/o function active 1 gnd ground 35 gnd ground 2 dq3 i/o data bit 3 36 cd1# o card detect 1 low 3 dq4 i/o data bit 4 37 dq11 i/o data bit 11 4 dq5 i/o data bit 5 38 dq12 i/o data bit 12 5 dq6 i/o data bit 6 39 dq13 i/o data bit 13 6 dq7 i/o data bit 7 40 dq14 i/o data bit 14 7 ce1# i card enable 1 low 41 dq15 i data bit 15 8 a10 i address bit 10 42 ce2# i card enable 2 low 9 oe# i output enable low 43 vs1 o voltage sense 1 low 10 a11 i address bit 11 44 rfu reserved 11 a9 i address bit 9 45 rfu reserved 12 a8 i address bit 8 46 a17 i address bit 17 13 a13 i address bit 13 47 a18 i address bit 18 14 a14 i address bit 14 48 a19 i address bit 19 15 we# i write enable low 49 a20 i address bit 20 2mb(3) 16 rdy/bsy # o ready/busy low 50 a21 i address bit 21 4mb(3) 17 vcc supply voltage 51 vcc supply voltage 18 vpp1 prog. voltage n.c. 52 vpp2 prog. voltage n.c. 19 a16 i address bit 16 53 a22 i address bit 22 8mb(3) 20 a15 i address bit 15 54 a23 i address bit 23 16mb(3) 21 a12 i address bit 12 55 a24 i address bit 24 32mb(3) 22 a7 i address bit 7 56 a25 i address bit 25 64mb(3) 23 a6 i address bit 6 57 vs2 o voltage sense 2 n.c. 24 a5 i address bit 5 58 rst i card reset high 25 a4 i address bit 4 59 wait# o extended bus cycle low(2,) 26 a3 i address bit 3 60 rfu reserved 27 a2 i address bit 2 61 reg# i attrib mem select 28 a1 i address bit 1 62 bvd2 o bat. volt. detect 2 (2) 29 a0 i address bit 0 63 bvd1 o bat. volt. detect 1 (2) 30 dq0 i/o data bit 0 64 dq8 i/o data bit 8 31 dq1 i/o data bit 1 65 dq9 i/o data bit 9 32 dq2 i/o data bit 2 66 dq10 o data bit 10 33 wp o write potect high 67 cd2# o card detect 2 low 34 gnd ground 68 gnd ground pinout notes: 1. rdy/bsy signal is an ?open drain? type output, pull-up resistor on host side is required. 2. wait#, bvd1 and bvd2 are driven high for compatibility. 3. shows density for which specified address bit is msb. higher order address bits are no connects (ie 4mb a21 is msb a22 - a25 are nc). mechanical 54.0mm 0.10 (2.126?) 10.0mm min (0.400?) 1.6mm 0.05 (0.063?) 1.0mm 0.05 (0.039?) 1.0mm 0.05 (0.039?) 3.3mm t1 (0.130?) t1=0.10mm interconnect area t1=0.20mm substrate area interconnect area 10.0mm min (0.400?) 3.0mm min 85.6mm 0.20 (3.370?) substrate area
august 2000 rev. 4 - eco #13133 4 pcmcia flash memory card flv series pc card products symbol type name and function a0 - a25 input address inputs: a0 through a25 enable direct addressing of up to 64mb of memory on the card. signal a0 is not used in word access mode. a25 is the most significant bit dq0 - dq15 input/output data input/output: dq0 through dq15 constitute the bi- directional databus. dq15 is the msb. ce1#, ce2# input card enable 1 and 2: ce1# enables even byte accesses, ce2# enables odd byte accesses. multiplexing a0, ce1# and ce2# allows 8-bit hosts to access all data on dq0 - dq7. oe# input output enable: active low signal gating read data from the memory card. we# input write enable: active low signal gating write data to the memory card. rdy/bsy# output ready/busy output: indicates status of internally timed erase or program algorithms. a high output indicates that the card is ready to accept accesses. a low output indicates that one or more devices in the memory card are busy with internally timed erase or write activities. cd1#, cd2# output card detect 1 and 2: provide card insertion detection. these signals are internally connected to ground on the card. the host shall monitor these signals to detect card insertion (pulled-up on host side). wp output write protect: write protect reflects the status of the write protect switch on the memory card. wp set to high = write protected, providing internal hardware write lockout to the flash array. if card does not include optional write protect switch, this signal will be pulled low internally indicating write protect = "off". vpp1, vpp2 n.c. program/erase power supply: provides programming voltages for card . not connected for 3.3v/5v only card. vcc card power supply: (3.3v or 5.0v nominal). gnd card ground reg# input attribute memory select : active low signal, enables access to attribute memory plane, occupied by card information structure and card registers. rst input reset: active high signal for placing card in power-on default state. reset can be used as a power-down signal for the memory array. wait# output wait: this signal is pulled high internally for compatibility. no wait states are generated. bvd1, bvd2 output battery voltage detect: these signals are pulled high to maintain sram card compatibility. vs1, vs2 output voltage sense: notifies the host socket of the card's vcc requirements. vs1 grounded and vs2 is open to indicate a 3.3v/5v card. rfu reserved for future use n.c. no internal connection to card: pin may be driven or left floating card signal description read function common memory attribute memory function mode /ce2 /ce1 a0 /oe /we /reg d15-d8 d7-d0 /reg d15-d8 d7-d0 standby mode h h x x x x high-z high-z x high-z high-z byte access (8 bits) h l l l h hhigh-zeven-byte lhigh-zeven-byte hlhlh hhigh-zodd-byte lhigh-znot valid word access (16 bits) l l x l h h odd-byte even-byte lnot valideven-byte odd-byte only access l h x l h hodd-bytehigh-z lnot valid high-z write function standby mode h h x x x xx x xx x byte access (8 bits) hl lhl hxeven-byte lxeven-byte hlhhl hxodd-byte lx x word access (16 bits) l l x h l h odd-byte even-byte lxeven-byte odd-byte only access l h x h l hodd-byte x lx x functional truth table
august 2000 rev. 4 - eco #13133 5 pcmcia flash memory card flv series pc card products absolute maximum ratings (1) operating temperature ta (ambient) commercial 0c to +60 c industrial -40c to +85 c storage temperature commercial -30c to +80 c industrial -40c to +85 c voltage on any pin relative to vss -0.5v to vcc+0.5v vcc supply voltage relative to vss -0.5v to +7.0v note: (1) stress greater than those listed under ?absolute maximum ratings? may cause permanent damage to the device. this is a stress rating only and functional operation at these or any other conditions greater than those indicated in the operational sections of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect reliability. 3.3v vcc 5v vcc s y mbol parameter density ( mb y tes ) notes t yp (3 ) max t yp (3 ) max units test conditions i ccr vcc read current all 10 12 20 35 ma vcc = vccmax tc y cle = 150ns , cmos levels i ccw vcc program current all 28f008s c 28f016s c 60 75 ma i cce vcc erase current all 40 50 ma 2mb 50 200 60 230 a 20mb 2 28f008s c 400 420 4mb 50 200 60 230 i ccs ( cmos ) vcc standby current 40mb 2 28f016s c 400 420 vcc = vccmax control signals = vcc reset = vss, cmos levels notes: 1. all currents are rms values unless otherwise specified. iccr, iccw and icce are based on byte wide operations. for 16 bit operation values are double. 2. control signals: ce 1 #, ce 2 #, oe#, we#, reg#. 3. typical: vcc = 5v, t = +25c. cmos test conditions: vcc = 5v 5%, vil = vss 0.2v, vih = vcc 0.2v dc characteristics (1) symbol parameter notes min max units test conditions i li input leakage current 1 20 a vcc = vccmax vin =vcc or vss i lo output leakage current 1 20 a vcc = vccmax vout =vcc or vss v il input low voltage 1 0 0.8 v v ih input high voltage 1 0.7vcc vcc+0.5 v v ol output low voltage 1 0.4 v iol = 3.2ma v oh output high voltage 1 vcc-0.4 vcc v ioh = -2.0ma v lko vcc erase/program lock voltage 12.0 v notes: 1. values are the same for byte and word wide modes for all card densities. 2. exceptions: leakage currents on ce1#, ce2#, oe#, reg# and we# will be < 500 a when vin = gnd due to internal pull-up resistors. leakage currents on rst will be <150a when vin=vcc due to internal pull-down resistor. vcc = 3.3v / 5v
august 2000 rev. 4 - eco #13133 6 pcmcia flash memory card flv series pc card products 150ns 250ns symbol (pcmcia) parameter min max min max unit t c (r) read cycle time 150 250 ns t a (a) address access time 150 250 ns t a (ce) card enable access time 150 250 ns t a (oe) output enable access time 75 125 ns t su (a) address setup time 20 30 ns t su (ce) card enable setup time 0 0 ns t h (a) address hold time 20 30 ns t h (ce) card enable hold time 20 30 ns t v (a) output hold from address change 00ns t dis (ce) output disable time from ce# 75 100 ns t dis (oe) output disable time from oe# 75 100 ns t en (ce) output enable time from ce# 5 5 ns t en (oe) output enable time from oe# 5 5 ns t rec (rsr) power down recovery to output delay. vcc = 5v 500 600 ns ac characteristics note: ac timing diagrams and characteristics are guaranteed to meet or exceed pcmcia 2.1 specifications. read timing diagram note 1 note 1 a [25::0], /reg /ce1, /ce2 /oe d[15::0] tc(r) ta(a) th(a) tv(a) ta(ce) tsu(ce) th(ce) ten(oe) ta(oe) tsu(a) data valid tdis(ce) tdis(oe) read timing parameters note: signal may be high or low in this area.
august 2000 rev. 4 - eco #13133 7 pcmcia flash memory card flv series pc card products 150ns @ 5v 250ns @ 3.3 v symbol (pcmcia) parameter min max min max unit t c w w rite c y cle time 150 250 ns t w (we) w rite pulse width 80 150 ns t su (a) a ddress setu p time 20 30 ns t su (a-weh) a ddress setu p time for we # 100 180 ns t su (ce- weh) card enable setu p time for we # 100 180 ns t su (d-weh) data setu p time for we # 50 80 ns t h (d) data hold time 20 30 ns t rec (we) w rite recover time 20 30 ns t dis (we) out p ut disable time from we # 75 100 ns t dis (oe) out p ut disable time from oe # 75 100 ns t en (we) out p ut enable time from we # 55ns t en (oe) out p ut enable time from oe # 55ns t su (oe-we) out p ut enable setu p from we # 10 10 ns t h (oe-we) out p ut enable hold from we # 10 10 ns t su (ce) card enable setu p time from oe # 00ns t h (ce) card enable hold time 20 20 ns note: ac timing diagrams and characteristics are guaranteed to meet or exceed pcmcia 2.1 specifications. write timing diagram write timing parameters th (o e -w e ) note 1 /c e 1 , /c e 2 note 1 ts u (c e -w e h ) tc(w ) a [2 5::0 ], /r e g tw (w e ) td is(w e ) th (d ) d[15::0](din) d a t a in p u t ts u (a ) ts u (a -w e h ) /o e tsu (c e ) tsu(d -w e h ) trec(w e ) th (c e ) tsu (o e -w e ) td is(o e ) d[15::0](dout) ten (o e ) te n(w e ) note 2 note 2 /w e notes: 1. signal may be high or low in this area. 2. when the data i/o pins are in the output state, no signals shall be applied to the data pins (d15 - d0) by the host system.
august 2000 rev. 4 - eco #13133 8 pcmcia flash memory card flv series pc card products s y mbol parameter notes min typ (1) max units t whqv1 t ehqv1 word/byte program time 4 8 s t whqv2 t ehqv2 block program time device sc 0.4 0.5 sec block erase time device sc 0.9 1.1 sec data write and erase performance (1,3) notes: 1. typical: nominal voltages and t a = 25c. 2. excludes system overhead. 3. valid for all speed options. 4. to maximize system performance rdy/bsy# signal should be polled. vcc = 5v 5%, t a = 0c to + 70c s y mbol parameter notes min typ (1) max units t whqv1 t ehqv1 word/byte program time 4 17 s t whqv2 t ehqv2 block program time device sc 1.1 sec block erase time device sc 1.8 sec vcc = 3.3v 0.3v, t a = 0c to + 70c
august 2000 rev. 4 - eco #13133 9 pcmcia flash memory card flv series pc card products edi company name lot code / trace number date code part number product marking wed 7p016flv2600c15 c995 9915 note: some products are currently marked with our pre-merger company name/acronym (edi). during our transition period, some products will also be marked with our new company name/acronym (wed). starting october 2000 all pcmcia products will be marked only with the wed prefix. card capacity 016 16mb packaging option 00 standard, type 1 pc card p standard pcmcia r ruggedized pcmcia card family and version - see card family and version info. for details (next page) temperature range c commercial 0c to +70c i industrial -40c to +85c card access time 15 150ns 25 250ns card technology 7flash 8sram part numbering 7 p 016 flv26 00 c 15
august 2000 rev. 4 - eco #13133 10 pcmcia flash memory card flv series pc card products card family and version information ** denotes advanced information. flv 21-flv24 based on 28f008sc for 3.3v / 5v application flv 21 no attribute memory, no write protect switch flv 22 with attribute memory, no write protect switch flv 23 no attribute memory,with write protect switch flv 24 with attribute memory, with write protect switch example p/n 7p xxx flv 22 ss t zz flv 25-flv28 based on 28f016sc for 3.3v / 5v application flv 25 no attribute memory, no write protect switch flv 26 with attribute memory, no write protect switch flv 27 no attribute memory,with write protect switch flv 28 with attribute memory, with write protect switch example p/n 7p xxx flv 26 ss t zz ordering information 7p xxx flvyy ss t zz where xxx: 002 1) 2mb 004 4mb 006 1) 6mb 008 8mb 010 1) 10mb 012 12mb 014 1) 14mb 016 16mb 018 1) 18mb 020 20mb 024 2) 24mb 028 2) 28mb 032 2) 32mb 036 2) 36mb 040 2) 40mb 1) available only for flv21 - flv24 2) available only for flv25 - flv28 flvyy: card version (see card family and version information) ss: 00 wedc silkscreen 01 blank housing, type i 02 blank housing, type i recessed t: c commercial i** industrial zz: 15 150ns note: options without attribute memory and with hardware write protect switch are available.
august 2000 rev. 4 - eco #13133 11 pcmcia flash memory card flv series pc card products cis information for flv series cards address value description address value description 00h 01h cistpl_device 2ah 1dh cistpl_device_oa 02h 03h tpl_link 2ch 03h tpl_link 04h 53h flash = 150ns (device writable) 2eh 02h 3 volt operation 06h 0eh card size: 4mb 30h 11h rom - 250ns 1eh 8mb 32h ffh end of device 2eh 12mb 34h 1ah cistpl_conf 3eh 16mb 36h 06h tpl_link 4eh 20mb 38h 01h tpcc_sz 5eh 24mb 3ah 00h tpcc_last 6eh 28mb 3ch 00h tpcc_radr 7eh 32mb 3eh 40h tpcc_radr 8eh 36mb 40h 03h tpcc_rmsk 9eh 40mb 42h ffh cistpl_end 08h ffh end of device 44h 1eh cistpl_devicegeo 0ah 1ch cistpl_device_oc 46h 06h tpl_link 0ch 04h tpl_link 48h 02h dgtpl_bus 0eh 02h 3 volt operation 4ah 11h dgtpl_ebs 10h 51h flash = 250ns (device writable) 4ch 01h dgtpl_rbs 0eh card size: 4mb 4eh 01h dgtpl_wbs 1eh 4mb 50h 01h dgtpl_part 2eh 12mb 01h flash device 3eh 16mb 52h non-interleaved 4eh 20mb 54h 20h cistpl_manfid 5eh 24mb 56h 04h tpl_link(04h) 6eh 28mb 58h f6h edi tplmid_manf: lsb 7eh 32mb 5ah 01h edi tplmid_manf: msb 8eh 36mb 5ch 00h lsb: number not assigned 12h 9eh 40mb 5eh 00h msb: number not assigned 14h ffh end of device 60h 15h cistpl_vers1 16h 18h cistpl_jedec_c 62h 47h tpl_link 18h 03h tpl_link 64h 05h tpllv1_major 1ah 89h intel - id 66h 00h tpllv1_minor 1ch aah intel 28f016sc ? id(4-40mb) 68h 45h e 1eh ffh end of device 6ah 44h d 20h 17h cistpl_device_a 6ch 49h i 22h 03h tpl_link 6eh 37h 7 24h 42h eeprom - 200ns 70h 50h p 26h 01h device size = 2kbytes 72h 30h 0 28h ffh end of tuple example for flv26 family, built with 28f016sc.
august 2000 rev. 4 - eco #13133 12 pcmcia flash memory card flv series pc card products cis information for flv series cards ( cont .) address value description 74h 34h 4 76h 30h 0 78h 46h f 7ah 4ch l 7ch 56h v 7eh 32h 2 80h 36h 6 82h 2dh - 84h 2dh - 86h 2dh - 88h 31h 1 8ah 35h 5 8ch 20h space 8eh 00h end text 90h 43h c 92h 4fh o 94h 50h p 96h 59h y 98h 52h r 9ah 49h i 9ch 47h g 9eh 48h h a0h 54h t a2h 20h space a4h 45h e a6h 4ch l a8h 45h e aah 43h c ach 54h t aeh 52h r b0h 4fh o b2h 4eh n b4h 49h i b6h 43h c b8h 20h space bah 44h d bch 45h e beh 53h s c0h 49h i c2h 47h g c4h 4eh n c6h 53h s address value description c8h 20h space cah 49h i cch 4eh n ceh 43h c d0h 4fh o d2h 52h r d4h 50h p d6h 4fh o d8h 52h r dah 41h a dch 54h t deh 45h e e0h 44h d e2h 20h space e4h 00h end text e6h 31h 1 e8h 39h 9 eah 39h 9 ech 37h 7 eeh 00h end text f0h ffh end of list
august 2000 rev. 4 - eco #13133 13 pcmcia flash memory card flv series pc card products revision rev date descrpt 00 sep-98 initial release 01 02-dec-98 cis, value in line 0ch 02 7-jun-99 logo change 03 30-may-00 added page 9, revised page 10, changed page header 04 1-aug-00 corrected timing error pg. 6 revision history white electronic designs corporation one research drive, westborough, ma 01581, usa tel: (508) 366 5151 fax: (508) 836 4850 www.whiteedc.com

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